Computer Science 220
Assembly Language & Computer Architecture

Fall 2010, Siena College

Course Schedule

"COD" indicates readings from Computer Organization and Design, The Hardware/Software Interface, Fourth Edition, Patterson and Hennessy. Additional readings will be given occasionally. Links will be added here with additional information about lectures, labs, and other assignments. All assignment dates are subject to change, and are provided only as a general guideline until the actual assignment is handed out in class.


Topic and/or Event Readings
Sept. 7 Lecture 01: Introduction and Overview; Bits and Numbers Topic Notes: Introduction and Overview, Topic Notes: Bits and Numbers, COD Ch. 1
Sept. 9 Lecture 02: Binary Arithmetic; Signed Representations; Signed Arithmetic COD Ch. 2.4
Sept. 7/10 Lab 0: C and Unix Introduction
Sept. 14 Lecture 03: Logical and Bitwise Operations COD Ch. 3.5
Sept. 16 Lecture 04: Floating Point Representations; vonNeumann Architectures; Introduction to MIPS ISA Topic Notes: MIPS ISA, COD Ch. 2.1-2.3
Sept. 14/17 Lab 1: C and Bitwise Operations
Sept. 21 Lecture 05: MIPS ISA COD Ch. 2.5-2.7
Sept. 23 Lecture 06: Introduction to MIPS Programming
Sept. 21/24 Lab 2: Decoding MIPS Instructions
Sept. 28 Lecture 07: MIPS Programming Topic Notes: MIPS Programming; COD Ch. 2.8
Sept. 30 Lecture 08: Advanced MIPS Programming COD Ch. 2.9-2.10
Sept. 28/Oct. 1 Lab 3: MIPS Programming with SPIM
Oct. 5 Lecture 09: MIPS Subroutines
Oct. 7 Lecture 0a: Exam Review
Oct. 5/8 Lab 4: Advanced MIPS Programming
Oct. 12 Exam 1 (during class, lab, or evening - your choice)
Oct. 14 Lecture 0b: Introduction to Digital Logic Topic Notes: Digital Logic; COD App. C.1-C.2 (on the CD)
Oct. 12/15 No Lab Meetings: President's Holiday (Friday)
Oct. 19 Lecture 0c: Combinational Circuits COD App. C.3
Oct. 21 Lecture 0d: Encoders and Decoders; Adders COD App. C.5-C.6
Oct. 19/22 Lab 5: Real MIPS Programming
Oct. 26 Lecture 0e: Adders; Introduction to Sequential Circuits Topic Notes: Sequential Circuits; COD App. C.7
Oct. 28 Lecture 0f: Latches and Flip-Flops COD App. C.8
Oct. 26/29 Lab 6: TTL Circuit Introduction
Nov. 2 Lecture 10: Counters; Building Memory Topic Notes: Memory; COD App. C.9
Nov. 4 Lecture 11: Building Larger Memory
Nov. 2/5 Lab 7: Intermediate Circuits
Nov. 9 Lecture 12: Exam Review
Nov. 11 Exam 2 (during class)
Nov. 9/12 Lab 8: A Simple Memory System with TTL (no lab meetings)
Nov. 16 Lecture 13: Introduction to Microarchitecture: Data Paths and Control Topic Notes: Data Paths and Control; COD Ch. 4.1-4.3, App. C.5
Nov. 18 Lecture 14: MIPS Single-Cycle Implementation COD Ch. 4.4
Nov. 16/19 Lab 8 continues (meet to construct circuits)
Nov. 23 Lecture 15: Completing Single-Cycle
Nov. 25 No Class: Happy Thanksgiving!
Nov. 23/26 No Labs: Happy Thanksgiving!
Nov. 30 Lecture 16: Pipelines Topic Notes: Pipelines; COD Ch. 4.5
Dec. 2 Lecture 17: Pipeline Hazards; Pipelined Data Path and Control COD Ch. 4.6-4.8
Nov. 30/Dec. 3 Lab 9: Single-Cycle MIPS Subset Simulation
Dec. 7 Lecture 18: Handling Hazards; Memory Hierarchy and Cache Topic Notes: Memory Hierarchy; COD Ch. 5
Dec. 9 Lecture 19: Cache
Dec. 7/10 Lecture lab10: During Lab Meeting: ISA Comparisons Topic Notes: ISA Comparisons; COD 2.17
Dec. 17 Review session, 1:30-3:30 PM, RB 328
Dec. 18 Final Exam, 8:30-10:30 AM, RB 208