Computer Science 220
Assembly Language & Computer Architecture
Fall 2010, Siena College
In this first hands-on digital logic lab, our objective is to familiarize you with the workings of the digital lab by constructing a few simple TTL circuits. You will also construct some circuits in Logisim.
Given equipment limitations, you will need to work in groups of two.
The in-lab portion of this assignment is available only as a handout, not the online version. Here is an electronic version of the Integrated Circuit Handouts you received in lab.
Logisim Problems
Grading and Evalulation
This lab is graded out of 35 points.
By 10:00 AM, Friday, November 6, 2010, submit the completed lab problem sheet (hard copy) and your Logisim circuits as attachments by email to jteresco AT siena.edu.
Grading Breakdown | |
Chip descriptions | 2 points |
5-input NAND diagram and circuit | 4 points |
XOR diagram and circuit | 4 points |
Half adder diagram and circuit | 5 points |
NAND-only half adder diagram | 4 points |
NAND-only full adder diagram | 4 points |
Logisim circuit for 5-input AND | 2 points |
Logisim circuit for full adder using NANDs | 4 points |
Logisim circuit for 8-bit fast RC adder | 6 points |