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Computer Science 324 Computer Architecture Mount Holyoke College Fall 2009
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Lab 2: Sequential Circuits
Due: All circuit demos by 3:00 PM, Wednesday, October 7, 2009; Written submission by 1:15 PM, Friday, October 9, 2009
You will spend some time this week constructing some circuits in the
lab, and drawing some others by hand for written submission.
In Lab: More Complex Circuits
Construct circuits using TTL logic (the chips, wires, breadboards,
etc.) for the following. First, draw chip-numbered pin diagrams of
your circuits. Once you have done this (and, ideally, gotten a stamp
of approval), you may construct and test your circuits. You may work
individually or in pairs on the circuit construction portion of this
assignment.
- Construct a 3-bit adder/subtractor along the lines of the one we
discussed in class. Use three switches for each of your 3-bit
inputs, and an additional switch to control the line that selects
addition or subtraction. Use 4 of the LEDs to display your 3-bit
answer and the carry out bit.
- We looked at the S-R Latch built from NOR gates in class.
Construct an S-R Latch using only NAND gates. Use two switches for
the S and R inputs, and display Q and
Qbar using LEDs.
Written Problems
Please complete the following problems on paper. You may verify your
work using TTL logic or Logisim. Neatness is essential for me to be
able to decipher and grade your circuits. You may discuss these
problems with your classmates, but everyone should submit
individually, and the work you submit must be your own.
- As you saw in the lecture assignment from this week, it is
sometimes necessary to add 1 to a number - for example, a program
counter. You constructed, for the lecture assignment, a device that
is less expensive than a ripple-carry adder, that adds one to a
value that is provided (D0..D3) and provides the result on the
output (Q0..Q3).
Now, construct a similar device for adding 1 to a gray-code value.
(Hint: you may find the circuit from the lecture assignment to be a useful
building block.)
- In class we learned about clocked D-type flip-flops. Such a
device has inputs D and CLK, and output Q. Occasionally, it is
useful to explicitly set (S) or reset (R) Q without regard to
D. For example, it might be useful to clear (reset) all of memory
without explicitly providing data to each bit.
- [a.] Suppose S and R only operate when the clock is going-high.
Such inputs are called synchronous because their effect is
synchronized with the clock. Draw a circuit that implements D-type
flip-flops with synchronous set and reset.
- [b.] Suppose S and R operate without regard to the clock.
Such inputs are called asynchronous because their effect is
not synchronized with the clock. Draw a circuit that
implements D-type flip-flops with asynchronous set and reset.
- Suppose you have several T-type clocked flip-flops with Q and
Qbar
and asynchronous set and reset.
- [a.] Construct a 4-bit count-up counter. This device provides
access to a 4-bit register (Q0-Q3) that counts upward every time a
clock pulse (CLK) goes high. In addition, a 4-bit value (D0-D3)
can be loaded into the counter if the load bit (LD) is high and the
clock goes high.
- [b.] Construct a decade count-up counter. This device provides
access to a 4-bit register (Q0-Q3) that cycles through the values
0..9. Counting occurs when the clock pulse (CLK) goes high. In
addition a single line CLR asynchronously clears the register.
- Using any of the flip-flops, latches, and counters that we have
discussed in class as building blocks, construct a circuit that
takes input from a single switch and produces a single output.
After the first, second, and third times that the switch goes from 0
to 1, the output is 0. The fourth time that the switch goes from 0
to 1, the output becomes 1. The fifth, sixth, and seventh times the
switch goes from 0 to 1, the output should be 0. The eighth time,
the output is 1, and so on. In other words, the output is 1 exactly
when the switch has been moved from 0 to 1 a number of times that is
divisible by 4.