Computer Science 324 Computer Architecture Mount Holyoke College Fall 2007

This week's task is to build the memory interface for a very small computer.

Your implementation should include the following units, built with TTL logic on breadboards:

• A 256 nibble memory. Use the 2114 1024x4 bit memory chips (leaving (3)/(4) of the nibbles unused). You can find out more about the 2114 in the file 74LSDataBook.pdf in the the course shared directory. Historical note: the 2114 was used to store high scores for some video game systems during the 1980's.
• The MAR (memory address register). This register drives the address bus.
• The MBR (memory buffer register). This is a unit, composed of several chips, that reads values from and writes values to the data bus.

Use the 74LSDataBook.pdf file to decide which chips you need. You should find appropriate chips in the lab. The memory chips can be found in an unmarked drawer in the bottom row. You may also wish to use some of the logic gates we used previously.

When completed, the entire circuit should have the following capabilities and behaviors:

1. Loading the MAR. When the "A" pushbutton is pressed, the value represented by the 8 data switches (SW7-SW0) is loaded into the MAR.
2. Loading a value from "the outside world" (from the CPU in a real system) into the MBR. Data can be loaded into the MBR using the rightmost 4 data switches (SW3-SW0) by setting the leftmost 2 data switches (SW7 and SW6) low and pressing the "B" pushbutton. The other two switches are ignored.
3. Storing the value in the MBR into memory. The data contained in the MBR can be stored into the memory location indicated by the MAR by setting SW7 to 1 and SW6 to 0 and pressing the "B" pushbutton.
4. Retrieving a value from memory into the MBR. The data contained in memory at the address indicated by MAR can be stored in the MBR by setting SW7 to 1, SW6 to 1 and pressing the "B" pushbutton. You can think of SW7 as enabling a read/write between the MBR and memory (CS from our class discussions), with that SW6 controlling the direction of the data flow (RD/(not)WRT, or who's "driving" the data bus).
5. The rightmost 4 LED's (LED3-LED0) should be configured to display the contents of the MBR at all times--even when the MBR is not driving the data bus. The leftmost 4 LED's (LED7-LED4) should be configured to display the contents of the data bus at all times.

A LogicWorks design or a hand-drawn circuit are not required, but would be accepted to increase your opportunity for partial credit should your circuit fail to work entirely properly.

Your breadboard should be neat, with non-I/O wires flat to the board. All chips and many of your wires should be labeled. This will not only aid in grading, but will be very helpful as you construct the circuit.

A correct circuit can be built using as few as 7 chips, but reasonable implementations may use a few more.

Be sure to design, implement, and test your circuit incrementally. Make sure each component is working as expected as you add it to your circuit. While all LEDs and switches have assigned purposes in the final circuit, you may wish to use them in other ways during the testing of your individual components.

You should plan to demonstrate your circuit no later than 4:00 PM next Thursday. Circuits will be graded on correctness, good design, and neatness of wiring. Note: grades will not be recorded until you have taken down your circuit and neatly put away all wires and chips.