Computer Science 237 Computer Organization Williams College Fall 2006

Agenda

• It's All About the Pentiums, Weird Al Yankovic
• Announcements
  • Join us for the Computer Science end-of-semester party, 2:30 PM, TCL 206
  • Join the Operating Systems class for their final project presentations, Monday 1:30-3:30, TCL 206
  • Join Prof. Morgan McGuire for his graphics night colloquium, Monday 7-9 PM, where he will discuss and demonstrate the new gaming consoles
• Final Exam
  • You have a copy of last year's exam to see what kinds of questions I might ask
  • The exam will be available starting Saturday morning from the Registrar's office
  • I am happy to answer any questions up until the time you have picked up the exam, but answers will be limited to clarifications once you begin
• Microcode
  • Deadline: 11:59 PM (but I will be mostly unavailable to help after 2:30 PM)
  • Grading: see e-mail
  • I intend to grade them on Saturday
• Modern Architectures
  • Overriding theme of modern processors: parallelism
  • physical limitations of the sequential processor is forcing performance increases to come from concurrency
  • What's Intel up to? See their "Core Microarchitecture" demo
  • The MMX (and AMD's 3DNow!, and more recently SSE, SSE2, SSE3) extensions to the Intel Pentium core
    • SSE = Streaming SIMD Extensions, SIMD = single instruction multiple data
    • Very simple idea to support arithmetic on short operands: cut the carry lines
    • Possible to manipulate 8 bytes (64 bits) simultaneously
    • Packing and unpacking instructions must be introduced
    • Relatively few changes to the ALU - Manipulation of two RGB+alpha pixels in a single operation

      rrrrrrrr gggggggg bbbbbbbb alphalph rrrrrrrr gggggggg bbbbbbbb alphalph
      

      Treat as 8, 8-bit numbers
    • Several modes allow the ALU to consider its input as 8 independent bytes or 4 independent words or 2 independent longwords
    • Makes programming more challenging: consider conditional pixel modification
  • Hyperthreading
    • Present two "logical processors" to the operating system
    • Share most resources, but each logical process has its own registers, PC
    • processor chooses instructions (or microinstructions) from each logical stream to keep processing capabilities occupied
  • Multi-core
    • Intel and AMD have focused on this as opposed to increasing clock speeds
    • Symmetric multiprocessing on a chip
    • Everyone has two cores now
    • Next year: 4 cores
    • A few years down the line: dozens?
    • Hey, that's a lot of transistors!
    • How do we keep all these cores busy?
  • IBM's recent cell architecture, in collaboration with Sony and Toshiba
    • Instructions and the data they manipulate are bound together in an apulet
    • A cell is a hierarchically structured "bundle of control and streaming processor resources" or scalable processing element
    • Apulets can be arbitrarily assigned to cells
    • More intense computation is performed by adding more cells to the pool
    • Now in HDTV and game systems (PS3) from Sony and Toshiba

Links

• Intel Core Microarchitecture
• SSE
• Cell Architecture Explained