Computer Science 237 Computer Organization Williams College Fall 2006

Agenda

• Turn in Lab 1 worksheets
• Announcements
• Lab 2 Continues
  • Approach the problem one step at a time (rows, then cols, ...)
  • Given 4 5-bit patterns (regardless of configuration) how can you tell if all 4 contain a piece and if so, if all 4 match in some bit? Hint: think logical ops &, |, ~, note that you can process multiple bits at once with these, likely avoiding shifts
• MC68K Architecture
  • 16 general-purpose registers
    • 8 data registers: D0-D7
    • 8 address registers: A0-A7
    All 16 can be used to hold any value. However, some instructions work only on one type or the other.
  • Special-purpose registers
    • program counter: (PC)
    • stack pointer: (SP, which is really just A7)
    • condition code/status register: (CCR) 8 bits, 5 of which have a specific meaning: Z=Zero, C=Carry, V=oVerflow, X=eXtend, and N=Negative. We will use all but X.
  • symmetric instruction set
    • designed to be used and flexible
    • e.g., ADD instruction works with all data registers
    • all address registers work equally well (except SP)
    • many other architectures tend not to be symmetric
  • byte-addressable big-endian memory
  • many addresses must be even (really word access) (So we could get away with 31 bits)
  • different versions have different address spaces 68010, 68030, 68040...
  • support for byte(8)/word(16)/long(32)
  • mass-market embedded processor (we will use the DragonBall in PDAs) - MC68328.
• MC68K Assembly Programming - Basic addressing modes
  • Register direct modes (e.g. %D0, %A0)
  • Immediate mode (e.g. #3)
• MC68K Instruction set details (See /usr/cs-local/share/cs237/docs.)
  • Many instructions need a size specifier .B for byte, .W for word, .L for longword
  • Assignment instructions:
    MOVE, CLR (same as MOVE of #0)

    	MOVE.L	#1, %D4
    	MOVE.L	%D4, %D3
    

  • Arithmetic instructions:
    ADD, SUB, MULS, MULU, DIVS, DIVU, NEG

    	ADD.W	#6, %D2
    	ADD.W	%D4, %D2
    

  • Logical instructions:
    AND, OR, EOR, NOT
  • Shifter operations:
    LSR, LSL, ASR, ASL, SWAP, ROR, ROL
  • Testing operations:
    CMP, TST (same as CMP to #0)
  • Branching operations:
    BRA, BLE, BLT, BEQ, BGT, BGE
  • Oddities:
    NOP, ILL