Computer Science 220
Assembly Language & Computer Architecture

Fall 2011, Siena College

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Agenda

• Announcements
  • Sign up for the CS party!
• Final exam
  • practice final available now.
  • exam available Thursday 12/15. 10-minute sessions to go over the questions at 10:30 AM, 2:30 PM, and 4:30 PM in RB 306.
  • exam due back by 10:30 AM, Monday 12/19 (the end of our scheduled exam slot).
• Lecture assignment 0x19 recap
• Memory Hierarchy and Cache
  • associativity
  • cache management

Lecture Assignment 0x1a

Due at the start of class, Never.

You need not submit answers to these questions, but you will have a chance to ask questions about them at the start of class.

1. COD Exercise 5.4, all parts
2. COD Exercise 5.6.4 and 5.6.5
3. Since the time to access data for both hits and misses affects performance, designers often use an effective access time (EAT) to evaluate alternative cache designs. Effective access time can be defined as:
   EAT = t_hit + r_miss * t_miss
   for a hit time of t_hit, a miss rate of r_miss and a miss penalty of t_miss.
   a. Find the EAT for a processor with a 2 ns clock, t_miss = 20 clock cycles, r_miss = 0.05 misses per instruction, and a t_hit (cache access time, including hit detection) = 1 clock cycle. Assume that the read and write miss penalties are the same and ignore other write stalls.
   b. Suppose we can improve r_miss to 0.03 misses per reference by doubling the cache size. This causes the cache access time t_hit to increase to 1.2 clock cycles. Using the EAT as a metric, determine if this is a good trade-off.