Computer Science 324
Computer Architecture

Agenda

• Announcements
  • National CS Education week next week. You've probably heard. Be there.
• Exam 2 out Tuesday
  • Focus on topics since last exam. Starting with error-correcting memory, up to today's topics.
  • Open book, notes, class web pages. Closed Internet.
  • Expect to take about 3 hours, but take as long as you wish.
• RISC vs. CISC ISAs
• Sun Sparc ISA
  • register windows
• x86/IA-32 ISA

Examples

• assembly

Lecture Assignment

This lecture assignment is due at the start of class, Tuesday, December 8.

Please turn in a hard copy answer to Exercise 2.38, parts 1b, 2b, and 3b, only (reproduced below). We will discuss these during class, so no late submissions are accepted.

The x86 instruction set includes the REP prefix that causes the instruction to be repeated a given number of times or until a condition is satisfied. The first three problems (the three you are to do) refer to the following x86 instruction:

b. REP MOVSD, which does the following:

Repeat until ECX is zero:
Mem32[EDI]=Mem32[ESI], EDI=EDI+4, ESI=ESI+4, ECX=ECX-1

2.38.1. What would be a typical use for this instruction?

2.38.2. Write MIPS code that performs the same operation, assuming that $a0 corresponds to ECX, $a1 to EDI, $a2 to ESI, and $a3 to EAX.

2.38.3. If the x86 instruction takes one cycle to read memory, one cycle to write memory, and one cycle for each register update, and if MIPS takes one cycle per instruction, what is the speed-up of using this x86 instruction instead of the equivalent MIPS code when ECX is very large? Assume that the clock cycle time for x86 and MIPS is the same.