## Computer Science 237 |

**Lab 4: Digital Design Lab I****Due: Wednesday, October 11, 2006 at 9:00 AM**

Please complete each of the following problems, and turn them in on this sheet.

- Gray code is an alternative binary representation of integers.
Interestingly, incrementing a number in gray code causes the
representation to change by exactly one bit. We have seen one context
where this representation is useful when we labeled our Karnaugh maps.
Consider the following table used to convert 3-bit binary integers
into their gray code equivalents:
binary 000 001 010 011 100 101 110 111 gray code 000 001 011 010 110 111 101 100 - Construct three combinational circuits that compute the 1's digit, the 2's digit, and 4's digit of gray code. Please use the general or-of-ands network (the "sum-of-products" we discussed in class). Do not apply any simplification techniques.
- Construct the simplest, most elegant circuit you can to convert a binary number (on three inputs) to a gray code number (on three outputs).

- In class, we saw how any boolean function can be expressed in
disjunctive form -- as a disjunction (or) of a set of terms (often
called
*min-terms*), each of which is a conjunction (and) of inputs or their negations. This is a handy if you happen to be a digital circuit designer that has a very large pile of*and*and*not*gates, and one big*or*gate. But what if instead you have large piles of*or*and*not*gates, but only a single big*and*? Show that it is possible to express any boolean function as the conjunction of a set of terms, each of which is a disjunction of inputs.- Prove that deMorgan's law for converting conjunctions to
disjunctions (with negations) holds for
*n>2*inputs. - Prove that deMorgan's law for converting disjunctions to
conjunctions (with negations) holds for
*n>2*inputs. - Use these to prove the conjecture.

- Prove that deMorgan's law for converting conjunctions to
disjunctions (with negations) holds for
- Suppose you are interested in constructing a circuit that is high
precisely when four input lines
*DCBA*represent a prime in 4-bit unsigned binary.- Use a Karnaugh map to generate a logical expression with the smallest number of terms that computes this function. Do not optimize the expression further.
- Suppose we didn't care if the function worked on the range 12..15. Use another Karnaugh map to generate a logical expression with the smallest number of terms that computes this function.

Hand in this lab worksheet along with the written homework problems.

digital lab and various simple TTL circuits.

When you enter lab, you will be handed a collection of TTL chips in antistatic foam. When you are not using the chips, please remember to return them to their antistatic containers. When the environment is dry, static electricity is a significant problem. The antistatic foam helps to dissipate any charges that otherwise might damage the chips.

You should have a number of different chips, including (but not limited to):

74LS00 | Quad 2-input NAND | |

74LS04 | Hex inverter | |

74LS08 | Quad 2-input AND | |

74LS32 | Quad 2-input OR | |

For this lab, you should complete solutions to each of the following questions. Each has several questions, which you should answer and submit with your lab writeup. Before moving from one question to the next, have the instructor or a teaching assistant check out your circuit.

- Other than those described above, what chips do you have? For each, indicate its purpose. (hint: see the attached chip overview)
- As a warm-up exercise, construct a circuit that is equivalent to
a 5-input AND gate. It lights LED 0 when SW0 through SW4 are all
high (1). Strive to use as few chips as possible. Draw the
pin-numbered logical circuit you will use
*before*you begin wiring. - Implement a two-input exclusive-or gate. An exclusive-or gate
generates a high signal when exactly one of its inputs is high. You
may use any circuit you wish, but it should light LED 0 when exactly
one of the two switches SW0 and SW1 are set high (1). Draw the
circuit you will use
*before*you begin wiring. **Extend**the circuit in the previous step to light LED 1 when both switches are set high (1). This circuit is, of course, a*half adder*and sums two one-bit values. Can you wire together two half adders to make a full adder - a device that adds three bits together, generating a two-bit sum? (You needn't actually wire it, but draw the logical circuit here.) Move the wire from LED 0 to input "A" of the 7-segment display, and the wire from LED 1 to the "B" input. Finally, ground the "D1" input. What happens?- Implement - draw a pin-and-chip numbered logical diagram on paper only - the half adder of the previous step using only 74LS00 chips.
- (Extra credit) Connect SW0 through SW3 to inputs "A" through "D" respectively. Next, switch each of the blue dip switches in succession. What happens? Now, describe the purpose of the chip in the upper left corner of the board. How many gates do you think it requires?

Lab attachment: Integrated Circuit Handouts