# Computer Science 237 Computer Organization

### Williams College Fall 2005

Lab 6: Sequential Logic
Due: Monday, October 24, 2005 at 11:00 AM

Lab meets this week in TCL 216. We will begin at 1:15 sharp to set up your accounts to use LogicWorks and to experiment with some of the functionality of LogicWorks. Expect to be done in under an hour.

In Lab: Using LogicWorks

At the start of lab, you will see how to install a copy of LogicWorks into your Mac account. Once you have this set up, launch the LogicWorks 3.0.2 application. We will build (together) an XOR circuit from AND and OR gates and experiment with some of the functionality of LogicWorks.

Before you leave lab, build an XOR circuit in LogicWorks using one 2-input AND gate, one 2-input OR gate, and one 2-input NAND gate (Big hint: AND together A OR B with A NAND B). Use binary switches for your inputs A and B, and install a binary probe on the output to verify your circuit's correct operation. Use a label to put your name on the circuit. Save the circuit with the name XORCircuit, print it out, and then use the turnin utility to submit XORCircuit.

Homework Problems

Please complete the following problems on paper. You may verify your work using TTL logic, or LogicWorks.

1. Occasionally it is necessary to add 1 to a number, for example, a program counter.
• [a.] Construct a device that is less expensive than a ripple-carry adder, that adds one to a value that is provided (D0..D3) and provides the result on the output (Q0..Q3). (Hint: you may consider a modular approach.)
• [b.] Construct a similar device for adding 1 to a gray-code value. (Hint: you may find part (a) useful.)
2. In class we learned about clocked D-type flip-flops. Such a device has inputs D and CLK, and output Q. Occasionally, it is useful to explicitly set (S) or reset (R) Q without regard to D. For example, it might be useful to clear (reset) all of memory without explicitly providing data to each bit.
• [a.] Suppose S and R only operate when the clock is going-high. Such inputs are called synchronous because their effect is synchronized with the clock. Draw a circuit that implements D-type flip-flops with synchronous set and reset.
• [b.] Suppose S and R operate without regard to the clock. Such inputs are called asynchronous because their effect is not synchronized with the clock. Draw a circuit that implements D-type flip-flops with asynchronous set and reset.
3. Suppose you have several T-type clocked flip-flops with Q and Qbar and asynchronous set and reset.
• [a.] Construct a 4-bit count-up counter. This device provides access to a 4-bit register (Q0-Q3) that counts upward every time a clock pulse (CLK) goes high. In addition a 4-bit value (D0-D3) can be loaded into the counter if the load bit (LD) is high and the clock goes high.
• [b.] Construct a decade count-up counter. This device provides access to a 4-bit register (Q0-Q3) that cycles between the values 0..9. Counting occurs when the clock pulse (CLK) goes high. In addition a single line CLR asynchronously clears the register.
4. Suppose we encode email addresses using an extended alphabet code (A=1, B=2, C=3, Z=26), with (`@`=27,`.`=28,`-`=29). All other combinations of bits never (0, 30, 31) are never used.